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The W65C816S extends the 65xx technology family to handle 16–bit processing with a 16MB memory space while its emulation mode allows complete hardware and software compatibility with 64KB 6502 designs. The New Direct Register and stack relative addressing provides capability for re–entrant, re–cursive and re–locatable programming.

Features of the W65C816S

• 8−bit data bus
• 24−bit Address Bus 16Mbyte Memory and IO Space
• 16−bit ALU, Accumulator, Stack Pointer and Index Registers
• 91 Variable Length Instructions
• 24 Addressing Modes
• 1.8−5V Operating Voltage
• 14MHz Operating Bus Speed
• Valid Data Address (VDA) and Valid Program Address (VPA) for cycle steal DMA implementation
• Abort (ABORTB) input and associated vector for processor repairs of bus error conditions
• Separate program and data bank registers for program segmentation or full 16 MByte linear addressing
• Direct Register and stack relative addressing for re−entrant, re−cursive and re−locatable programming
• Block Move Instructions
• Fully Static for Power and Radiation Management
• Verilog RTL Core Available for FPGA Development