WDC supplies a CMOS 65xx microprocessor family of microprocessors (MPU), microcontrollers (MCU), and micro peripherals IC/Chips for your new designs as well as replacements for obsolete chips from our licensees. In support of and for ease of development with our IC family we have developed a line of IC Dev-Kits, Tools, and Programming Manual.

Where To Buy IC Package Types IC Cross Reference Single Board Computers WDCTools Programming Manual

Microprocessor IC

W65C02S

The W65C02S is a low-power 8–bit microprocessor utilized in a vast array of products for the Automotive, Consumer, Industrial, and Medical markets. This chip features a full external data (8–bit) and address (16–bit) bus for easy integration with 8–bit peripherals and memory.

DataSheet  IP Core  W65C02SXB  Programming Manual

Features of the W65C02S

• 8−bit data bus
• 16−bit Address Bus 65Kbyte Memory and IO Space
• 69 Variable Length Instructions
• 16 Addressing Modes
• 1.8−5V Operating Voltage
• Fully Static for Power and Radiation Management
• Verilog RTL Core Available for FPGA Development

W65C816S

The W65C816S extends the 65xx technology family to handle 16–bit processing with a 16MB memory space while its emulation mode allows complete hardware and software compatibility with 64KB 6502 designs. The New Direct Register and stack relative addressing provide the capability for re-entrant, re–cursive, and re–locatable programming.

DataSheet  IP Core  W65C816SXB  Programming Manual

Features of the W65C816S

• 8−bit data bus
• 24−bit Address Bus 16Mbyte Memory and IO Space
• 16−bit ALU, Accumulator, Stack Pointer and Index Registers
• 91 Variable Length Instructions
• 24 Addressing Modes
• 1.8−5V Operating Voltage
• 14MHz Operating Bus Speed
• Valid Data Address (VDA) and Valid Program Address (VPA) for cycle steal DMA implementation
• Abort (ABORTB) input and associated vector for processor repairs of bus error conditions
• Separate program and data bank registers for program segmentation or full 16 MByte linear addressing
• Direct Register and stack relative addressing for re−entrant, re−cursive, and re−locatable programming
• Block Move Instructions
• Fully Static for Power and Radiation Management
• Verilog RTL Core Available for FPGA Development

Microcontroller IC

W65C134S

The W65C134S is a feature-rich 8–bit microcomputer based on the W65C02 with an advanced (originally designed for life support) Serial Interface Bus (SIB) token passing local area network for multi–W65C134S processor systems. The W65C134S has a full external memory bus (8–bit data and 16–bit address bus) for flexible system design. This MCU has an embedded debug monitor ROM with a library of routines specific the hardware features of the W65C265S. WDC makes the source listing, reference manual, and source via Github for you to learn more about the features and possible use in your projects.

DataSheet  IP Core  W65C134SXB  Programming Manual

Monitor ROM Listing  Monitor ROM Ref Manual  Monitor ROM Source Github

Features of the W65C134S

• Full Software Selectable External Memory Bus
• 8−bit Data Bus
• 16−bit Address Bus
• 65Kbyte Memory and Memory Mapped IO Space
• Fully Static for Power and Radiation Management
• 8MHz Operating Bus Speed
• Industrial temperature range
• 2.8V − 5.5V power supply
• 56 CMOS compatible I/O lines
• 4096 x 8 Embedded Monitor ROM
• 192 x 8 On−Chip Static RAM
• Power management features
• 22 priority encoded interrupts
• UART 7/8−bit w/wo odd or even parity
• Serial Interface Bus (SIB) for Token Passing LAN
• 4 x 16 bit timers/counters
• Watch Dog Timer
• 8 Decoded Chip Select outputs
• Time of Day (ToD) clock features

W65C265S

For applications in production that require in-system diagnostics, the W65C265S is a perfect solution, featuring an internal system monitor ROM. If you need robust math for applications in sensing, such as pressure, temperature, revolutions per minute, flow monitoring and control, variable climate control or other systems for scientific, automotive, communications, home appliance/automation, then you’ll benefit from our ANSI Standard C compiler. This MCU has an embedded debug monitor ROM with a library of routines specific the hardware features of the W65C265S. WDC makes the source listing, reference manual, and source via Github for you to learn more about the features and possible use in your projects.

DataSheet  IP Core  W65C265SXB  MENSCH™  Programming Manual

Monitor ROM Listing  Monitor ROM Ref Manual  Monitor ROM Source Github

Features of the W65C265S

• Full Software Selectable External Memory Bus
• 8−bit Data Bus
• 24−bit Address Bus
• 16Mbyte Memory and Memory Mapped IO Space
• Fully Static for Power and Radiation Management
• 8MHz Operating Bus Speed
• Commercial temperature range
• 2.8V − 5.5V power supply
• 56 CMOS compatible I/O lines
• 8192 x 8 Embedded Monitor ROM
• 576 x 8 On−Chip Static RAM
• Power management features
• 29 priority encoded interrupts
• 4 UARTs with 7/8−bit w/wo odd or even parity
• Parallel Interface Bus (PIB) for Multi−processor Communications
• Time of Day (ToD) clock features
• 8 x 16-bit timers/counters
• Watch Dog Timer
• Software Controlled 4x Bus Speed Shifting for slow memory or peripherals

Peripheral IC

W65C22N/S

The W65C22S 8/16 bit Versatile Interface Adapter (VIA) is a flexible I/O device similar to the W65C21. In addition to I/O, the W65C22 provides two programmable 16–bit Interval Timer/Counters with latches and synchronous serial interface shift register. The W65C22 is available in both CMOS and NMOS compatible versions.

DataSheet  IP Core  W65C02SXB  W65C816SXB  Programming Manual

Features of the W65C22

• 2 x 8−bit, bi−directional peripheral I/O Ports
• 2 x 16−bit programmable Interval Timer/Counters
• Synchronous Serial bi−directional peripheral I/O Port
• Enhanced “Handshake” feature works with either 8− or 8/16−bit systems
• Latched Input/Output Registers on both I/O Ports
• Programmable Data Direction Registers
• TTL compatible I/O peripheral lines
• 1.8V(W65C22S only) − 5V Power Supply
• Bus compatible with 14 MHz W65C02S and W65C816S
• Compatible with the 65xx and 68xx family of microprocessors
• Replacement for Rockwell / GTE / CMD / Synertek / MO

W65C22S/W65C22N Differences

• The W65C22S is lower power, faster and direct drive outputs with no current limiting resistors on outputs ports.
• The W65C22N is a plug replacement of NMOS 6522 devices with current limiting resistors on output ports.
• The W65C22N does not have bus holding devices on the input, IO pins.
• The W65C22N IRQB is an open-drain output that CAN be Wire-ORd, unlike the totem-pole output of the W65C22S (some customers have had to use a diode in series with the IRQB output when using the W65C22S in their systems that had Wire-ORd interrupts).

W65C21N/S

The W65C21 Peripheral Interface Adapter (PIA), a flexible I/O device, has been used successfully with many different microprocessor families especially the 65xx, 68xx/68xxx, and x86 microprocessors. Two program controlled 8–bit bi-directional (bit programmable) peripheral I/O ports allow direct interfacing between the microprocessor and selected peripheral units with manual or interrupt-driven hand–shaking. The W65C21 is available in both CMOS and NMOS compatible versions.

DataSheet  IP Core  W65C02SXB  W65C816SXB  Programming Manual

Features of the W65C21

• 2 x 8−bit bidirectional I/O ports with individual data direction control
• Automatic “Handshake” control of data transfers
• 2 Interrupt outputs with program control
• Static to 14MHz operation, with high-speed Port A, CA2 outputs
• 40 Pin Plastic Dip and 44 Pin Plastic PLCC versions
• 5V Power Supply
• Bus compatible with 14 MHz W65C02S and W65C816S
• Compatible with the 65xx and 68xx family of microprocessors
• Replacement for Motorola/Freescale / Rockwell / AMI / MOS Technology / MOSTEK / HITACHI / ST Microelectronics / GTE / CMD, 6520, 6521, 6820, 6821, PIA′s

W65C21N/W65C21S Differences

• The W65C21S is lower power, faster and direct drive outputs with no current limiting resistors on outputs ports and TTL input thresholds.
• The W65C21N is a plug replacement of NMOS 6521 and 6821 devices with current limiting resistors on outputs ports and TTL input thresholds.
• The W65C21N Port A input buffers supply 200uA pull-up current at 2.4V in the input mode, while the W65C21S Port A input buffers supply 50uA pull-up current at 2.4V in the input mode.

W65C51N

The WDC CMOS W65C51N Asynchronous Communications Interface Adapter (ACIA) provides an easily implemented, program-controlled interface between microprocessor-based systems and serial communication data sets and modems.

DataSheet  IP Core  W65C02SXB  W65C816SXB  Programming Manual

Features of the W65C51N

• Full duplex operation with buffered receiver and transmitter
• Data set/modem control functions
• Internal baud rate generator with 16 programmable baud rates (50 to 115,200)
• Program−selectable internally or externally controlled receiver rate
• Programmable word lengths, number of stop bits, and parity bit generation and detection
• Programmable interrupt control
• Program reset
• Program−selectable serial echo mode
• 2 Chip Selects
• 14 MHz Operating Bus Speed
• 5V Power Supply
• Full TTL compatibility
• Bus compatible with 14 MHz W65C02S and W65C816S
• Bus Compatible with 65xx and 68xx microprocessors
• Not a direct replacement for legacy systems